Harnessing Room-Temperature Ferroelectricity in Metal Oxide Monolayers for Advanced Logic Devices

TL;DR

This paper predicts room-temperature out-of-plane ferroelectricity in buckled metal oxide monolayers, which can enable high-performance, power-efficient logic devices with improved thermionic leakage mitigation.

Contribution

It introduces a new family of buckled metal oxide monolayers exhibiting ferroelectricity and unique band structures suitable for advanced FETs, a novel finding in 2D materials.

Findings

Ferrolectricity in MO monolayers at room temperature

FETs with high ON/OFF ratio and subthreshold swing <60 mV/decade

Mitigation of thermionic leakage in 2D ferroelectric transistors

Abstract

Two-dimensional ferroelectric materials are beneficial for power-efficient memory devices and transistor applications. Here, we predict out-of-plane ferroelectricity in a new family of buckled metal oxide (MO; M: Ge, Sn, Pb) monolayers with significant spontaneous polarization. Additionally, these monolayers have a narrow valence band, which is energetically separated from the rest of the low-lying valence bands. Such a unique band structure limits the long thermal tail of the hot carriers, mitigating subthreshold thermionic leakage and allowing field-effect transistors (FETs) to function beyond the bounds imposed on conventional FETs by thermodynamics. Our quantum transport simulations reveal that the FETs based on these MO monolayers exhibit a large ON/OFF ratio with an average subthreshold swing of less than 60 mV/decade at room temperature, even for short gate lengths. Our work motivates further exploration of the MO monolayers for developing advanced, high-performance memory and logic devices.