Genetic Motifs as a Blueprint for Mismatch-Tolerant Neuromorphic Computing

TL;DR

This paper introduces a biologically inspired architectural approach for neuromorphic computing that enhances robustness against device mismatch, using network motifs and genetic rules, validated through benchmarking on a classification dataset.

Contribution

It proposes a novel differentiable re-parameterization method based on genetic patterns to improve mismatch tolerance in neuromorphic systems, outperforming existing hardware-aware techniques.

Findings

Outperforms standard hardware-aware training methods.

Mitigates mismatch-induced noise without precise mismatch measurements.

Provides a general robustness solution for SNNs in neuromorphic hardware.

Abstract

Mixed-signal implementations of SNNs offer a promising solution to edge computing applications that require low-power and compact embedded processing systems. However, device mismatch in the analog circuits of these neuromorphic processors poses a significant challenge to the deployment of robust processing in these systems. Here we introduce a novel architectural solution inspired by biological development to address this issue. Specifically we propose to implement architectures that incorporate network motifs found in developed brains through a differentiable re-parameterization of weight matrices based on gene expression patterns and genetic rules. Thanks to the gradient descent optimization compatibility of the method proposed, we can apply the robustness of biological neural development to neuromorphic computing. To validate this approach we benchmark it using the Yin-Yang classification dataset, and compare its performance with that of standard multilayer perceptrons trained with state-of-the-art hardware-aware training method. Our results demonstrate that the proposed method mitigates mismatch-induced noise without requiring precise device mismatch measurements, effectively outperforming alternative hardware-aware techniques proposed in the literature, and providing a more general solution for improving the robustness of SNNs in neuromorphic hardware.