FuzzWiz -- Fuzzing Framework for Efficient Hardware Coverage
Deepak Narayan Gadde, Aman Kumar, Djones Lettnin, Sebastian Simon

TL;DR
FuzzWiz is an automated hardware fuzzing framework that leverages software fuzzing techniques to rapidly achieve high coverage in RTL verification, significantly reducing verification time for complex SoC designs.
Contribution
This paper introduces FuzzWiz, a novel hardware fuzzing framework that adapts software fuzzing methods for efficient RTL coverage and bug detection.
Findings
Achieved 90% coverage in 10x less time than traditional methods.
Demonstrated scalability on multiple IP blocks from Google's OpenTitan.
Showed compatibility with various fuzzing engines.
Abstract
Ever-increasing design complexity of System-on-Chips (SoCs) led to significant verification challenges. Unlike software, bugs in hardware design are vigorous and eternal i.e., once the hardware is fabricated, it cannot be repaired with any patch. Despite being one of the powerful techniques used in verification, the dynamic random approach cannot give confidence to complex Register Transfer Leve (RTL) designs during the pre-silicon design phase. In particular, achieving coverage targets and exposing bugs is a complicated task with random simulations. In this paper, we leverage an existing testing solution available in the software world known as fuzzing and apply it to hardware verification in order to achieve coverage targets in quick time. We created an automated hardware fuzzing framework FuzzWiz using metamodeling and Python to achieve coverage goals faster. It includes parsing the…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsEmbedded Systems Design Techniques
