A 10.60 $\mu$W 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection
Yifan Qin, Zhenge Jia, Zheyu Yan, Jay Mok, Manto Yung, Yu Liu, Xuejiao, Liu, Wujie Wen, Luhong Liang, Kwang-Ting Tim Cheng, X. Sharon Hu, Yiyu Shi

TL;DR
This paper introduces an ultra-low power, sparse mixed-bit-width CNN accelerator that efficiently detects ventricular arrhythmia with high accuracy, suitable for implantable medical devices, achieving significant power and size reductions.
Contribution
The paper presents a novel sparse, mixed-bit-width CNN accelerator with high efficiency and low power consumption, optimized for medical device applications.
Findings
Achieves 10.60 μW power consumption and 150 GOPS performance.
Demonstrates 50% sparsity in a quantized 1D CNN.
Power density is 14.23 times lower than state-of-the-art solutions.
Abstract
This paper proposes an ultra-low power, mixed-bit-width sparse convolutional neural network (CNN) accelerator to accelerate ventricular arrhythmia (VA) detection. The chip achieves 50% sparsity in a quantized 1D CNN using a sparse processing element (SPE) architecture. Measurement on the prototype chip TSMC 40nm CMOS low-power (LP) process for the VA classification task demonstrates that it consumes 10.60 W of power while achieving a performance of 150 GOPS and a diagnostic accuracy of 99.95%. The computation power density is only 0.57 W/mm, which is 14.23X smaller than state-of-the-art works, making it highly suitable for implantable and wearable medical devices.
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Taxonomy
Methods1-Dimensional Convolutional Neural Networks
