The Continuous-Time RC-Chain ADC
Hampus Malmberg, Fredrik Feyling
TL;DR
This paper introduces a simple, amplifier-less continuous-time ADC using passive components, offering robustness to variations and offsets, with a design method validated through simulations.
Contribution
It presents a novel, passive-only continuous-time ADC architecture and an analytical design procedure validated by behavioral simulations.
Findings
Robustness to component variations and comparator offsets
Validated design procedure with behavioral transient simulations
Passive architecture suitable for specific SNR and bandwidth requirements
Abstract
An amplifier-less continuous-time analog-to-digital converter consisting of only passives, comparators, and inverters is presented. Beyond simplicity, the architecture displays significant robustness properties with respect to component variations and comparator input offsets. We give an analytical design procedure demonstrating how to parameterize the architecture to a range of signal-to-noise and bandwidth requirements and validate the procedure's accuracy with behavioral transient simulations.
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Taxonomy
TopicsAnalog and Mixed-Signal Circuit Design · CCD and CMOS Imaging Sensors · Low-power high-performance VLSI design