12-spin-qubit arrays fabricated on a 300 mm semiconductor manufacturing line
Hubert C. George, Mateusz T. M\k{a}dzik, Eric M. Henry, Andrew J. Wagner, Mohammad M. Islam, Felix Borjans, Elliot J. Connors, J. Corrigan, Matthew Curry, Michael K. Harper, Daniel Keith, Lester Lampert, Florian Luthi, Fahd A. Mohiyaddin, Sandra Murcia, Rohit Nair, Rambert Nahm

TL;DR
This paper reports on the design, fabrication, and testing of a 12-spin-qubit array on a 300 mm semiconductor line, demonstrating scalable quantum device manufacturing using high-volume industrial processes.
Contribution
It introduces a new quantum test chip with 12 spin qubits fabricated via standard high-volume semiconductor processes, advancing scalable quantum computing hardware.
Findings
Successful fabrication of 12-qubit arrays using EUV lithography
Device characterization confirms qubit functionality
Supports scaling of 2D qubit array schemes
Abstract
Intels efforts to build a practical quantum computer are focused on developing a scalable spin-qubit platform leveraging industrial high-volume semiconductor manufacturing expertise and 300 mm fabrication infrastructure. Here, we provide an overview of the design, fabrication, and demonstration of a new customized quantum test chip, which contains 12-quantum-dot spin-qubit linear arrays, code named Tunnel Falls. These devices are fabricated using immersion and extreme ultraviolet lithography (EUV), along with other standard high-volume manufacturing (HVM) processes, as well as production-level process control. We present key device features and fabrication details, as well as qubit characterization results confirming device functionality. These results corroborate our fabrication methods and are a crucial step towards scaling of extensible 2D qubit array schemes.
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Taxonomy
TopicsQuantum Computing Algorithms and Architecture
