Runtime Reduction in Linear Quantum Charge-Coupled Devices using the Parity Flow Formalism

TL;DR

This paper introduces a formalism that eliminates physical SWAP gates in linear quantum charge-coupled devices, significantly reducing circuit runtime and enabling larger quantum computations within coherence time constraints.

Contribution

The authors develop the Parity Flow formalism to remove physical SWAP gates in linear QCCDs without increasing two-qubit operations, improving quantum circuit efficiency.

Findings

Reduces runtime of quantum Fourier transform and QAOA in linear QCCDs.

Enables larger problem sizes within coherence time limits.

Significantly decreases execution time compared to standard compilers.

Abstract

Using the Parity Flow formalism, we show that physical SWAP gates can be eliminated in linear hardware architectures, without increasing the total number of two-qubit operations. This has a significant impact on the execution time of quantum circuits in linear Quantum Charge-Coupled Devices (QCCDs), where SWAP gates are implemented by physically changing the position of the ions. Because SWAP gates are one of the most time-consuming operations in QCCDs, our scheme considerably reduces the runtime of the quantum Fourier transform and the quantum approximate optimization algorithm on all-to-all spin models, compared to circuits generated with standard compilers (TKET and Qiskit). While increasing the problem size (and therefore the number of qubits) typically demands longer runtimes, which are constrained by coherence time, our runtime reduction enables a significant increase in the number of qubits at a given coherence time.