DUMBO: Making durable read-only transactions fly on hardware transactional memory

TL;DR

DUMBO is a novel design for persistent hardware transactions that significantly improves the performance of read-only transactions on emerging persistent memories by leveraging advanced suspend and resume instructions.

Contribution

DUMBO introduces a new approach that eliminates key bottlenecks in read-only transactions on persistent hardware, outperforming existing designs by up to 4x.

Findings

DUMBO outperforms state-of-the-art designs by up to 4x in performance.

Experimental results on IBM POWER9 with TPC-C benchmark demonstrate significant improvements.

The approach effectively leverages advanced suspend/resume instructions in hardware transactional memory.

Abstract

Despite the recent improvements in supporting Persistent Hardware Transactions (PHTs) on emerging persistent memories (PM), the poor performance of Read-Only (RO) transactions remains largely overlooked. We propose DUMBO, a new design for PHT that eliminates the two most crucial bottlenecks that hinder RO transactions in state-of-the-art PHT. At its core, DUMBO exploits advanced instructions that some contemporary HTMs provide to suspend (and resume) transactional access tracking. Our experimental evaluation with an IBM POWER9 system using the TPC-C benchmark shows that DUMBO can outperform the state of the art designs for persistent hardware (SPHT) and software memory transactions (Pisces), by up to 4.0x.