Low-Power Encoding for PAM-3 DRAM Bus
Jonghyeon Nam, Jaeduk Han, Hokeun Kim

TL;DR
This paper introduces three low-power encoding algorithms for PAM-3 signaling in DRAM interfaces, significantly reducing energy consumption and improving efficiency in high-speed memory links.
Contribution
It presents novel PAM-3 encoding algorithms specifically designed to lower power consumption in DRAM memory interfaces.
Findings
Reduced termination power by 41% to 90% in benchmarks
Demonstrated energy efficiency improvements in DRAM links
Validated algorithms using gem5 simulator traces
Abstract
The 3-level pulse amplitude modulation (PAM-3) signaling is expected to be widely used in memory interfaces for its greater voltage margins compared to PAM-4. To maximize the benefit of PAM-3, we propose three low-power data encoding algorithms: PAM3-DBI, PAM3-MF, and PAM3-SORT. With the DRAM memory traces from the gem5 computer architecture simulator running benchmarks, we evaluate the energy efficiency of our three PAM-3 encoding techniques. The experimental results show the proposed algorithms can reduce termination power for high-speed memory links significantly by 41% to 90% for benchmark programs.
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Taxonomy
TopicsVLSI and Analog Circuit Testing · Interconnection Networks and Systems · Low-power high-performance VLSI design
