Gating monolayer and bilayer graphene with a two-dimensional semiconductor

TL;DR

This study evaluates the effectiveness of two-dimensional semiconductors as gates in graphene devices, revealing their comparable performance to metals at low temperatures and identifying limitations like hysteresis and resistivity effects.

Contribution

It demonstrates that 2D semiconductors can serve as functional gates in graphene devices, expanding options beyond traditional metallic gates with specific operational insights.

Findings

Semiconducting gates perform similarly to metallic gates below liquid helium temperatures.

Resistivity and charge trapping effects influence device behavior under certain conditions.

Effective gating parameters are identified for dual-gated graphene devices.

Abstract

Metals are commonly used as electrostatic gates in devices due to their abundant charge carrier densities that are necessary for efficient charging and discharging. A semiconducting gate can be beneficial for certain fabrication processes, in low light conditions, and for specific gating properties. We determine the effectiveness and limitations of a semiconducting gate in graphene and bilayer graphene devices. Using the semiconducting transition metal dichalcogenides molybdenum disulfide (MoS2), molybdenum diselenide (MoSe2), tungsten disulfide (WS2), and tungsten diselenide (WSe2), we show that two-dimensional semiconductors can be used to suitably gate the graphene devices under appropriate operating conditions. For single-gated devices, semiconducting gates are comparable to metallic gates below liquid helium temperatures but include resistivity features resulting from gate voltage clamping of the semiconductor. In dual-gated devices, we pin down the parameter range of effective operation and find that the semiconducting depletion regime results in clamping and hysteresis from defect-state charge trapping.