Application-Aware Benchmarking on NISQ Hardware using Expectation Value Fidelities
Joseph Harris, Peter K. Schuhmacher

TL;DR
This paper introduces a cost-effective benchmarking protocol for quantum hardware that predicts expectation value fidelities for application circuits, demonstrated on a kicked-Ising model, outperforming traditional gate error predictions.
Contribution
The authors develop an application-aware benchmarking method using Clifford circuits to accurately predict fidelity scaling, applicable to circuits with Pauli rotation decompositions.
Findings
More accurate fidelity predictions than randomized benchmarking
Effective benchmarking of quantum error mitigation techniques
Applicable to circuits with Pauli rotation decompositions
Abstract
We present a low-cost protocol for benchmarking applications on generic quantum hardware in the circuit model. Using families of Clifford circuits which mimic the application circuit structure, we are able to predict how measured expectation value fidelities scale with circuit depth. We consider the specific example of simulating a kicked-Ising model on superconducting hardware, showing our benchmark to be more accurate than predictions which use the gate error data obtained through randomized benchmarking. We also demonstrate how our work can be used to benchmark the performance and limitations of quantum error mitigation techniques. Our method is targeted at applications which have a natural decomposition in terms of Pauli rotations, but can be applied to any input circuit with this decomposition.
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsEmbedded Systems Design Techniques
