Characterizing and modeling the influence of geometry on the performance of superconducting nanowire cryotrons

TL;DR

This paper investigates how the geometry of superconducting nanowire cryotrons affects their performance, providing models and experimental results that optimize gain, jitter, and energy dissipation for cryogenic integrated circuits.

Contribution

It introduces an electro-thermal model linking material parameters and device geometry to performance, and demonstrates optimized nanocryotron designs on niobium nitride.

Findings

Achieved a maximum gain of 48 dB

Energy dissipation less than 20 aJ per operation

Jitter under 60 ps

Abstract

The scaling of superconducting nanowire-based devices to larger arrays is often limited by the cabling required to interface with each device. Cryogenic integrated circuits constructed from nanowire cryotrons, or nanocryotrons, can address this limitation by performing signal processing on chip. In this study, we characterize key performance metrics of the nanocryotron to elucidate its potential as a logical element in cryogenic integrated circuits and develop an electro-thermal model to connect material parameters with device performance. We find that the performance of the nanocryotron depends significantly on the device geometry, and trade-offs are associated with optimizing the gain, jitter, and energy dissipation. We demonstrate that nanocryotrons fabricated on niobium nitride can achieve a grey zone less than 210 nA wide for a 5 ns long input pulse corresponding to a maximum achievable gain of 48 dB, an energy dissipation of less than 20 aJ per operation, and a jitter of less than 60 ps.