Scalable quantum eraser for superconducting integrated circuits

TL;DR

This paper proposes a scalable, fast quantum eraser scheme for superconducting circuits using frequency-tunable transmon qubits, addressing decoherence issues and enabling efficient multi-qubit resetting for quantum processors.

Contribution

It introduces a programmable superconducting erasing head with tunable couplers, demonstrating simultaneous multi-qubit resetting and strategies to mitigate decoherence effects.

Findings

Simultaneous resetting of two qubits verified.

Collectivity effects can accelerate erasing process.

A parameter set to erase states within decoherence-free subspace.

Abstract

A fast and scalable scheme for multi-qubit resetting in superconducting quantum processors is proposed by exploiting the feasibility of frequency-tunable transmon qubits and transmon-like couplers to engineer a full programmable superconducting erasing head. The scalability of the device is verified by simultaneously resetting two qubits, where we show that collectivity effects may emerge as an fundamental ingredient to speed up the erasing process. Conversely, we also describe the appearance of decoherence-free subspace in multi-qubit chips, causing it to damage the device performance. To overcome this problem, a special set of parameters for the tunable frequency coupler is proposed, which allows us to erase even states within such subspace. To end, we offer a proposal to buildup integrated superconducting processors that can be efficiently connected to erasure heads in a scalable way.