Learning Task-Based Trainable Neuromorphic ADCs via Power-Aware Distillation

TL;DR

This paper introduces a power-aware, task-based neuromorphic ADC design using memristors, which improves classification accuracy and reduces power consumption by jointly tuning ADCs and processing algorithms, even under noisy conditions.

Contribution

It proposes a novel physically compliant memristive ADC model with a data-driven tuning algorithm that addresses memristor stochasticity and enhances task-specific performance.

Findings

Up to 27% accuracy improvement over uniform ADCs.

Power consumption reduced by up to 66%.

Effective under noisy conditions with 19% accuracy gains.

Abstract

The ability to process signals in digital form depends on analog-to-digital converters (ADCs). Traditionally, ADCs are designed to ensure that the digital representation closely matches the analog signal. However, recent studies have shown that significant power and memory savings can be achieved through task-based acquisition, where the acquisition process is tailored to the downstream processing task. An emerging technology for task-based acquisition involves the use of memristors, which are considered key enablers for neuromorphic computing. Memristors can implement ADCs with tunable mappings, allowing adaptation to specific system tasks or power constraints. In this work, we study task-based acquisition for a generic classification task using memristive ADCs. We consider the unique characteristics of this such neuromorphic ADCs, including their power consumption and noisy read-write behavior, and propose a physically compliant model based on resistive successive approximation register ADCs integrated with memristor components, enabling the adjustment of quantization regions. To optimize performance, we introduce a data-driven algorithm that jointly tunes task-based memristive ADCs alongside both digital and analog processing. Our design addresses the inherent stochasticity of memristors through power-aware distillation, complemented by a specialized learning algorithm that adapts to their unique analog-to-digital mapping. The proposed approach is shown to enhance accuracy by up to 27% and reduce power consumption by up to 66% compared to uniform ADCs. Even under noisy conditions, our method achieves substantial gains, with accuracy improvements of up to 19% and power reductions of up to 57%. These results highlight the effectiveness of our power-aware neuromorphic ADCs in improving system performance across diverse tasks.