Performance of Parity QAOA for the Signed Max-Cut Problem

TL;DR

This paper evaluates the performance of Parity QAOA, a quantum algorithm architecture designed for noisy quantum devices, demonstrating its advantages over conventional QAOA in solving the signed Max-Cut problem.

Contribution

It provides a comparative analysis of Parity QAOA and conventional QAOA, showing improved performance on certain graph instances and establishing performance bounds using Clifford circuits.

Findings

Parity QAOA outperforms conventional QAOA at fixed circuit depth

Performance bounds are estimated using Clifford circuits for larger problem sizes

Single-layer recursive variants of both algorithms perform equally

Abstract

The practical implementation of quantum optimization algorithms on noisy intermediate-scale quantum devices requires accounting for their limited connectivity. As such, the Parity architecture was introduced to overcome this limitation by encoding binary optimization problems onto planar quantum chips. We investigate the performance of the Quantum Approximate Optimization Algorithm on the Parity architecture (Parity QAOA) for solving instances of the signed Max-Cut problem on complete and regular graphs. By comparing the algorithms at fixed circuit depth, we demonstrate that Parity QAOA outperforms conventional QAOA implementations based on SWAP networks. Our analysis utilizes Clifford circuits to estimate lower performance bounds for Parity QAOA for problem sizes that would be otherwise inaccessible on classical computers. For single layer circuits we additionally benchmark the recursive variant of the two algorithms, showing that their performance is equal.