In-place Switch: Reprogramming based SLC Cache Design for Hybrid 3D SSDs
Xufeng Yang, Zhengjian Cong, Congming Gao

TL;DR
This paper introduces an in-place reprogramming method for hybrid 3D SSDs that dynamically switches SLC pages to TLC to enhance performance and reduce write amplification.
Contribution
It proposes the In-place Switch (IPS) technique that reprograms used SLC pages to TLC in situ, improving cache management and SSD performance.
Findings
Reduces write latency by up to 25%.
Cuts write amplification by up to 47%.
Maintains sufficient SLC cache dynamically.
Abstract
Recently, 3D SSDs are widely adopted in PCs, data centers, and cloud storage systems. To increase capacity, high bit-density cells, such as Triple-Level Cell (TLC), are utilized within 3D SSDs. However, due to the inferior performance of TLC, a portion of TLCs is configured to operate as Single-Level Cell (SLC) to provide high performance, with host data initially directed to the SLCs. In SLC/TLC hybrid 3D SSDs, a portion of the TLC space is designated as an SLC cache to achieve high SSD performance by writing host data at the SLC speed. Given the limited size of the SLC cache, block reclamation is necessary to free up the SLC cache during idle periods. However, our preliminary studies indicate that the SLC cache can lead to a performance cliff if filled rapidly and cause significant write amplification when data migration occurs during idle times. In this work, we propose leveraging…
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Taxonomy
TopicsAdvanced Data Storage Technologies · 3D IC and TSV technologies · Cellular Automata and Applications
