Towards Efficient Neuro-Symbolic AI: From Workload Characterization to Hardware Architecture

TL;DR

This paper analyzes workload characteristics of neuro-symbolic AI, identifies hardware inefficiencies, and proposes optimization and acceleration strategies to enhance performance and scalability of neuro-symbolic systems.

Contribution

It systematically categorizes neuro-symbolic algorithms, evaluates their hardware performance issues, and presents a hardware acceleration case study for improved efficiency.

Findings

Neuro-symbolic models are memory-bound and inefficient on standard hardware.

Complex control flow and data dependencies hinder scalability.

Cross-layer optimization can significantly improve neuro-symbolic system performance.

Abstract

The remarkable advancements in artificial intelligence (AI), primarily driven by deep neural networks, are facing challenges surrounding unsustainable computational trajectories, limited robustness, and a lack of explainability. To develop next-generation cognitive AI systems, neuro-symbolic AI emerges as a promising paradigm, fusing neural and symbolic approaches to enhance interpretability, robustness, and trustworthiness, while facilitating learning from much less data. Recent neuro-symbolic systems have demonstrated great potential in collaborative human-AI scenarios with reasoning and cognitive capabilities. In this paper, we aim to understand the workload characteristics and potential architectures for neuro-symbolic AI. We first systematically categorize neuro-symbolic AI algorithms, and then experimentally evaluate and analyze them in terms of runtime, memory, computational operators, sparsity, and system characteristics on CPUs, GPUs, and edge SoCs. Our studies reveal that neuro-symbolic models suffer from inefficiencies on off-the-shelf hardware, due to the memory-bound nature of vector-symbolic and logical operations, complex flow control, data dependencies, sparsity variations, and limited scalability. Based on profiling insights, we suggest cross-layer optimization solutions and present a hardware acceleration case study for vector-symbolic architecture to improve the performance, efficiency, and scalability of neuro-symbolic computing. Finally, we discuss the challenges and potential future directions of neuro-symbolic AI from both system and architectural perspectives.