FSL-HDnn: A 5.7 TOPS/W End-to-end Few-shot Learning Classifier Accelerator with Feature Extraction and Hyperdimensional Computing
Haichao Yang, Chang Eun Song, Weihong Xu, Behnam Khaleghi, Uday, Mallappa, Monil Shah, Keming Fan, Mingu Kang, and Tajana Rosing

TL;DR
FSL-HDnn is an energy-efficient, end-to-end few-shot learning accelerator that combines feature extraction and hyperdimensional computing, achieving high performance and energy savings in a 40 nm CMOS process.
Contribution
The paper presents a novel integrated accelerator leveraging hyperdimensional computing and weight clustering for efficient, gradient-free few-shot learning in hardware.
Findings
Achieves 5.7 TOPS/W energy efficiency for feature extraction.
Attains 0.78 TOPS/W for classification and learning phases.
Provides 2.6x and 6.6x improvements over state-of-the-art CNN and FSL processors.
Abstract
This paper introduces FSL-HDnn, an energy-efficient accelerator that implements the end-to-end pipeline of feature extraction, classification, and on-chip few-shot learning (FSL) through gradient-free learning techniques in a 40 nm CMOS process. At its core, FSL-HDnn integrates two low-power modules: Weight clustering feature extractor and Hyperdimensional Computing (HDC). Feature extractor utilizes advanced weight clustering and pattern reuse strategies for optimized CNN-based feature extraction. Meanwhile, HDC emerges as a novel approach for lightweight FSL classifier, employing hyperdimensional vectors to improve training accuracy significantly compared to traditional distance-based approaches. This dual-module synergy not only simplifies the learning process by eliminating the need for complex gradients but also dramatically enhances energy efficiency and performance. Specifically,…
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Taxonomy
TopicsFerroelectric and Negative Capacitance Devices · Neural Networks and Reservoir Computing · Photonic and Optical Devices
