Efficient FPGA Implementation of an Optimized SNN-based DFE for Optical Communications

TL;DR

This paper presents an FPGA implementation of an optimized spiking neural network-based decision-feedback equalizer that outperforms ANN-based methods in energy efficiency and communication performance.

Contribution

It introduces a design space exploration for an SNN-based DFE, achieving higher energy efficiency and comparable throughput compared to ANN-based DFEs.

Findings

Achieves 25X higher energy efficiency than ANN-based DFE.

Provides higher communication performance at similar throughput.

Demonstrates effective FPGA implementation of SNN-based DFE.

Abstract

The ever-increasing demand for higher data rates in communication systems intensifies the need for advanced non-linear equalizers capable of higher performance. Recently artificial neural networks (ANNs) were introduced as a viable candidate for advanced non-linear equalizers, as they outperform traditional methods. However, they are computationally complex and therefore power hungry. Spiking neural networks (SNNs) started to gain attention as an energy-efficient alternative to ANNs. Recent works proved that they can outperform ANNs at this task. In this work, we explore the design space of an SNN-based decision-feedback equalizer (DFE) to reduce its computational complexity for an efficient implementation on field programmable gate array (FPGA). Our Results prove that it achieves higher communication performance than ANN-based DFE at roughly the same throughput and at 25X higher energy efficiency.