On the Impact of ISA Extension on Energy Consumption of I-Cache in Extensible Processors

TL;DR

This paper investigates how extending the instruction set architecture (ISA) affects energy consumption in extensible processors, showing that ISA modifications can reduce cache size and energy use while maintaining performance.

Contribution

It provides an analysis of ISA extension impacts on energy consumption and demonstrates how ISA design choices can optimize cache size and power efficiency.

Findings

Extended ISA can reduce cache size needed for performance

ISA modifications impact energy consumption directly

Designers can optimize energy use through ISA extension

Abstract

As is widely known, the computational speed and power consumption are two critical parameters in microprocessor design. A solution for these issues is the application specific instruction set processor (ASIP) methodology, which can improve speed and reduce power consumption of the general purpose processor (GPP) technique. In ASIP, changing the instruction set architecture (ISA) of the processor will lead to alter the number and the mean time of accesses to the cache memory. This issue has a direct impact on the processor energy consumption. In this work, we study the impacts of extended ISA on the energy consumption of the extended ISA processor. Also, we demonstrate the extended ISA let the designer to reduce the cache size in order to minimize the energy consumption while meeting performance constraint.