External Memories of PDP Switches for In-Network Implementable Functions Placement: Deep Learning Based Reconfiguration of SFCs
Somayeh Kianpisheh, Tarik Taleb

TL;DR
This paper proposes a DRL-based method for reconfiguring network function placement using external switch memories to meet QoS demands with low latency and high bandwidth, optimizing costs and deadlines.
Contribution
It introduces a novel DRL approach utilizing external switch memories for efficient VNF placement in dynamic networks, reducing reconfiguration costs and improving convergence.
Findings
Improved convergence rate in placement reconfiguration
Higher acceptance ratio of service chains
Reduced deployment and reconfiguration costs
Abstract
Network function virtualization leverages programmable data plane switches to deploy in-network implementable functions, to improve QoS. The memories of switches can be extended through remote direct memory access to access external memories. This paper exploits the switches external memories to place VNFs at time intervals with ultra-low latency and high bandwidth demands. The reconfiguration decision is modeled as an optimization to minimize the deployment and reconfiguration cost, while meeting the SFCs deadlines. A DRL based method is proposed to reconfigure service chains adoptable with dynamic network and traffic characteristics. To deal with slow convergence due to the complexity of deployment scenarios, static and dynamic filters are used in policy networks construction to diminish unfeasible placement exploration. Results illustrate improvement in convergence, acceptance ratio…
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Taxonomy
TopicsEmbedded Systems Design Techniques · VLSI and Analog Circuit Testing · Software-Defined Networks and 5G
