Dynamic Simultaneous Multithreaded Architecture
Daniel Ortiz-Arroyo, Ben Lee

TL;DR
This paper introduces DSMT, a dynamic multi-threading architecture for SMT processors that speculatively executes multiple threads, using data-driven predictions and simple dependency tracking to improve performance.
Contribution
It proposes a novel dynamic thread generation and speculation mechanism with a greedy policy for code section selection, enhancing SMT performance.
Findings
DSM T shows potential for performance improvement in SMT processors.
Frequent misspeculation can limit gains, highlighting the need for balancing parallelism and accuracy.
Simulation results demonstrate the architecture's effectiveness in exploiting thread-level parallelism.
Abstract
This paper presents the Dynamic Simultaneous Multi-threaded Architecture (DSMT). DSMT efficiently exe-cutes multiple threads from a single program on a SMT processor core. To accomplish this, threads are generated dynamically from a predictable flow of control and then executed speculatively. Data obtained during the single context non-speculative execution phase of DSMT is used as a hint to speculate the posterior behavior of multiple threads. DSMT employs simple mechanisms based on state bits that keep track of inter-thread dependencies in registers and memory, synchronize thread execution, and control recovery from misspeculation. Moreover, DSMT utilizes a novel greedy policy for choosing those sections of code which provide the highest performance based on their past execution history. The DSMT architecture was simulated with a new cycle-accurate, execution-driven simulator. Our…
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Taxonomy
TopicsEmbedded Systems Design Techniques · Parallel Computing and Optimization Techniques · Real-Time Systems Scheduling
