Benchmarking and Validation of Sub-mW 30GHz VG-LNAs in 22nm FDSOI CMOS for 5G/6G Phased-Array Receivers
Domenico Zito, Michele Spasaro

TL;DR
This paper benchmarks two low-power 30GHz variable-gain LNAs in 22nm FDSOI CMOS for 5G/6G phased-array receivers, validating a new design methodology that achieves record low power and compact size.
Contribution
It introduces a new class of VG-LNAs with fewer gain-control voltages and validates their performance and design methodology in 22nm FDSOI CMOS technology.
Findings
VG-LNA2 has comparable performance to VG-LNA1 with lower power.
The new design methodology achieves record low-power and small size.
Performance is robust across different gain control arrangements.
Abstract
Next-generation (5G/6G) wireless systems demand low-power mm-wave phased-array ICs. Variable-gain LNAs (VGLNAs) are key building blocks enabling hardware complexity reduction, performance enhancement and functionality extension. This paper reports a performance benchmarking of two low-power 30GHz VG-LNAs for phased-array ICs, which provide a 7.5dB gain control for 18dB Taylor taper in a 30GHz 8x8 antenna array, for a comprehensive validation of the new class of VGLNAs and its design methodology. In particular, this paper reports a second and implementation (VG-LNA2) with a reduced number (four) of gain-control back-gate voltages and super-low-Vt MOSFETs, with respect to the previous first implementation (VG-LNA1) with six gain-control back-gate voltages and regular- Vt MOSFETs, both in the same 22nm FDSOI CMOS technology. The results show that VG-LNA2 exhibits performance comparable to…
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Taxonomy
TopicsRadio Frequency Integrated Circuit Design · Microwave Engineering and Waveguides · Millimeter-Wave Propagation and Modeling
