Quantum State Preparation Circuit Optimization Exploiting Don't Cares

TL;DR

This paper presents a peephole optimization algorithm that exploits don't care conditions in quantum state preparation circuits to significantly reduce two-qubit gate counts, improving efficiency and device compatibility.

Contribution

It introduces a novel optimization method that identifies and utilizes don't care conditions to optimize quantum state preparation circuits beyond existing techniques.

Findings

Achieves 36% reduction in two-qubit gates

Identifies numerous conditions where local unitaries can be broken

Enhances circuit efficiency and device compatibility

Abstract

Quantum state preparation initializes the quantum registers and is essential for running quantum algorithms. Designing state preparation circuits that entangle qubits efficiently with fewer two-qubit gates enhances accuracy and alleviates coupling constraints on devices. Existing methods synthesize an initial circuit and leverage compilers to reduce the circuit's gate count while preserving the unitary equivalency. In this study, we identify numerous conditions within the quantum circuit where breaking local unitary equivalences does not alter the overall outcome of the state preparation (i.e., don't cares). We introduce a peephole optimization algorithm that identifies such unitaries for replacement in the original circuit. Exploiting these don't care conditions, our algorithm achieves a 36% reduction in the number of two-qubit gates compared to prior methods.