Unitary Designs from Random Symmetric Quantum Circuits

TL;DR

This paper investigates how random symmetric quantum circuits generate unitary designs, providing a unified framework to determine the design properties based on symmetry groups, gate locality, and universality constraints.

Contribution

It introduces a linear equation to exactly determine the maximum t for which the generated distribution is a t-design, considering various symmetry groups and gate localities.

Findings

Exact t_max values for U(1), SU(2), and cyclic groups as a function of qubits and locality.

t-designs are achievable under semi-universality conditions with polynomial growth in t.

Constraints on unitaries depend on symmetry and gate locality, affecting design properties.

Abstract

In this work, we study distributions of unitaries generated by random quantum circuits containing only symmetry-respecting gates. We develop a unified approach applicable to all symmetry groups and obtain an equation that determines the exact design properties of such distributions. It has been recently shown that the locality of gates imposes various constraints on realizable unitaries, which in general, significantly depend on the symmetry under consideration. These constraints typically include restrictions on the relative phases between sectors with inequivalent irreducible representations of the symmetry. We call a set of symmetric gates semi-universal if they realize all unitaries that respect the symmetry, up to such restrictions. For instance, while 2-qubit gates are semi-universal for $\mathbb{Z}_2$, U(1), and SU(2) symmetries in qubit systems, SU(d) symmetry with $d\ge 3$ requires 3-qudit gates for semi-universality. Failure of semi-universality precludes the distribution generated by the random circuits from being even a 2-design for the Haar distribution over symmetry-respecting unitaries. On the other hand, when semi-universality holds, under mild conditions, satisfied by U(1) and SU(2) for example, the distribution becomes a $t$-design for $t$ growing polynomially with the number of qudits, where the degree is determined by the locality of gates. More generally, we present a simple linear equation that determines the maximum integer $t_{\max}$ for which the uniform distribution of unitaries generated by the circuits is a $t$-design for all $t\leq t_{\max}$. Notably, for U(1), SU(2) and cyclic groups, we determine the exact value of $t_{\max}$ as a function of the number of qubits and locality of the gates, and for SU(d), we determine the exact value of $t_{\max}$ for up to $4$-qudit gates.