Fast Low Level Disk Encryption Using FPGAs

TL;DR

This paper compares FPGA implementations of recent tweakable enciphering schemes for disk encryption, showing that FAST outperforms others like AEZ, XCB, and EME2 in simulation results, indicating its potential for future use.

Contribution

It provides FPGA architectures and simulation results for AEZ and FAST, demonstrating FAST's superior performance for low level disk encryption.

Findings

FAST outperforms AEZ, XCB, and EME2 in FPGA simulations.

Simulation results on Virtex FPGAs validate the efficiency of FAST.

FAST is a promising candidate for disk encryption standardization.

Abstract

A fixed length tweakable enciphering scheme (TES) is the appropriate cryptographic functionality for low level disk encryption. Research on TES over the last two decades have led to a number of proposals many of which have already been implemented using FPGAs. This paper considers the FPGA implementations of two more recent and promising TESs, namely AEZ and FAST. The relevant architectures are described and simulation results on the Xilinx Virtex 5 and Virtex 7 FPGAs are presented. For comparison, two IEEE standard schemes, XCB and EME2 are considered. The results indicate that FAST outperforms the other schemes making it a serious candidate for future incorporation by disk manufacturers and standardisation bodies.