HGNAS: Hardware-Aware Graph Neural Architecture Search for Edge Devices
Ao Zhou, Jianlei Yang, Yingjie Qi, Tong Qiao, Yumeng Shi, Cenlin Duan,, Weisheng Zhao, Chunming Hu

TL;DR
HGNAS is a novel hardware-aware graph neural architecture search framework designed for resource-constrained edge devices, optimizing GNN models for real-time performance and memory efficiency.
Contribution
This work introduces the first automated, hardware-aware GNN architecture search framework specifically tailored for edge devices, incorporating a performance predictor and peak memory estimation.
Findings
Achieves up to 10.6x speedup over DGCNN.
Reduces peak memory usage by 82.5%.
Maintains accuracy with negligible loss.
Abstract
Graph Neural Networks (GNNs) are becoming increasingly popular for graph-based learning tasks such as point cloud processing due to their state-of-the-art (SOTA) performance. Nevertheless, the research community has primarily focused on improving model expressiveness, lacking consideration of how to design efficient GNN models for edge scenarios with real-time requirements and limited resources. Examining existing GNN models reveals varied execution across platforms and frequent Out-Of-Memory (OOM) problems, highlighting the need for hardware-aware GNN design. To address this challenge, this work proposes a novel hardware-aware graph neural architecture search framework tailored for resource constraint edge devices, namely HGNAS. To achieve hardware awareness, HGNAS integrates an efficient GNN hardware performance predictor that evaluates the latency and peak memory usage of GNNs in…
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Taxonomy
TopicsAdvanced Memory and Neural Computing · Graph Theory and Algorithms · Machine Learning in Materials Science
MethodsDeep Graph Convolutional Neural Network
