HiMA: Hierarchical Quantum Microarchitecture for Qubit-Scaling and Quantum Process-Level Parallelism

TL;DR

HiMA introduces a hierarchical quantum microarchitecture that enhances qubit scalability and process-level parallelism, significantly improving control system efficiency and achieving record CLOPS in a 72-qubit superconducting quantum processor.

Contribution

This paper presents a novel hierarchical microarchitecture for quantum control, enabling scalable qubit management and high parallelism, with implementation on a large superconducting quantum processor.

Findings

Achieved up to 4.89x speedup with 5-process parallelism.

Reached a record CLOPS of 43,680 across public platforms.

Demonstrated scalability to 6144 qubits with three-layer cascading.

Abstract

Quantum computing holds immense potential for addressing a myriad of intricate challenges, which is significantly amplified when scaled to thousands of qubits. However, a major challenge lies in developing an efficient and scalable quantum control system. To address this, we propose a novel Hierarchical MicroArchitecture (HiMA) designed to facilitate qubit scaling and exploit quantum process-level parallelism. This microarchitecture is based on three core elements: (i) discrete qubit-level drive and readout, (ii) a process-based hierarchical trigger mechanism, and (iii) multiprocessing with a staggered triggering technique to enable efficient quantum process-level parallelism. We implement HiMA as a control system for a 72-qubit tunable superconducting quantum processing unit, serving a public quantum cloud computing platform, which is capable of expanding to 6144 qubits through three-layer cascading. In our benchmarking tests, HiMA achieves up to a 4.89x speedup under a 5-process parallel configuration. Consequently, to the best of our knowledge, we have achieved the highest CLOPS (Circuit Layer Operations Per Second), reaching up to 43,680, across all publicly available platforms.