Hardware Implementation of Projection-Aggregation Decoders for Reed-Muller Codes

TL;DR

This paper develops hardware architectures for two projection-aggregation decoding methods for Reed-Muller codes, revealing that the unique projection aggregation (UPA) variant is more resource-efficient and energy-saving than the collapsed projection aggregation (CPA).

Contribution

It introduces hardware implementations for UPA and CPA decoders, highlighting the hardware efficiency of UPA over CPA and emphasizing the importance of hardware-aware optimization.

Findings

UPA decoder uses less resources than CPA.

UPA consumes less energy than CPA.

Software optimizations alone may not ensure hardware efficiency.

Abstract

This paper presents the hardware implementation of two variants of projection-aggregation-based decoding of Reed-Muller (RM) codes, namely unique projection aggregation (UPA) and collapsed projection aggregation (CPA). Our study focuses on introducing hardware architectures for both UPA and CPA. Through thorough analysis and experimentation, we observe that the hardware implementation of UPA exhibits superior resource usage and reduced energy consumption compared to CPA for the vanilla IPA decoder. This finding underscores a critical insight: software optimizations, in isolation, may not necessarily translate into hardware cost-effectiveness.