Optimizing Pulse Shapes of an Echoed Conditional Displacement Gate in a Superconducting Bosonic System

TL;DR

This paper introduces an optimized pulse-shaping method for echoed conditional displacement gates in superconducting bosonic systems, reducing gate times and improving logical state preparation efficiency.

Contribution

It presents a novel pulse-shaping technique for ECD gates that minimizes gate time and enhances state preparation, surpassing standard construction limitations.

Findings

Optimized pulse shapes are symmetric and tunable for different target parameters.

Gate time can be reduced by relaxing certain constraints or using optimal control.

Approximate 10% reduction in logical state preparation time achieved.

Abstract

Echoed conditional displacement (ECD) gates for bosonic systems have become the key element for real-time quantum error correction beyond the break-even point. These gates are characterized by a single complex parameter $\beta$, and can be constructed using Gaussian pulses and free evolutions with the help of an ancillary transmon qubit. We show that there is a lower bound for the gate time in the standard construction of an ECD gate. We present a method for optimizing the pulse shape of an ECD gate using a pulse-shaping technique subject to a set of experimental constraints. Our optimized pulse shapes remain symmetric, and can be applied to a range of target values of $\beta$ by tuning only the amplitude. We demonstrate that the total gate time of an ECD gate for a small value of $\beta$ can be reduced either by relaxing the no-overlap constraint on the primitives used in the standard construction or via our optimal-control method. We show a slight advantage of the optimal-control method by demonstrating a reduction in the preparation time of a $|+Z_\mathrm{GKP}>$ logical state by $\thicksim$$10\%$.