Linear Circuit Synthesis using Weighted Steiner Trees

TL;DR

This paper introduces a heuristic using weighted Steiner trees to optimize CNOT circuit synthesis in quantum computing, reducing gate count by up to 10% for devices with limited connectivity.

Contribution

It proposes a novel heuristic based on weighted Steiner trees for quantum circuit optimization, improving gate efficiency over existing methods.

Findings

Heuristic reduces CNOT gates by up to 10%.

Weighted Steiner trees improve circuit synthesis efficiency.

Heuristic is computationally low-cost and generally beneficial.

Abstract

CNOT circuits are a common building block of general quantum circuits. The problem of synthesizing and optimizing such circuits has received a lot of attention in the quantum computing literature. This problem is especially challenging for quantum devices with restricted connectivity, where two-qubit gates can only be placed between adjacent qubits. The state-of-the-art algorithms for optimizing the number of CNOT gates are heuristic algorithms that are based on Gaussian elimination and that use Steiner trees to connect between different subsets of qubits. In this article, we suggest considering weighted Steiner trees, and we present a simple low-cost heuristic to compute weights. The simulated evaluation shows that the suggested heuristic is almost always beneficial and reduces the number of CNOT gates by up to 10%.