Obstacle-Aware Length-Matching Routing for Any-Direction Traces in Printed Circuit Board
Weijie Fang, Longkun Guo, Jiawei Lin, Silu Xiong, Huan He, Jiacen Xu,, and Jianli Chen

TL;DR
This paper introduces an obstacle-aware routing method for PCB traces that ensures length matching while preserving original routing, using a novel multi-scale dynamic time warping technique for improved space utilization and handling differential pairs.
Contribution
It presents a new obstacle-aware routing approach focusing on the meandering stage, with a multi-scale dynamic time warping method for differential pairs, enhancing length matching in complex PCB designs.
Findings
Effective length-matching routing demonstrated.
Outperforms previous methods under complex constraints.
Handles differential pairs with the proposed MSDTW.
Abstract
Emerging applications in Printed Circuit Board (PCB) routing impose new challenges on automatic length matching, including adaptability for any-direction traces with their original routing preserved for interactiveness. The challenges can be addressed through two orthogonal stages: assign non-overlapping routing regions to each trace and meander the traces within their regions to reach the target length. In this paper, mainly focusing on the meandering stage, we propose an obstacle-aware detailed routing approach to optimize the utilization of available space and achieve length matching while maintaining the original routing of traces. Furthermore, our approach incorporating the proposed Multi-Scale Dynamic Time Warping (MSDTW) method can also handle differential pairs against common decoupled problems. Experimental results demonstrate that our approach has effective length-matching…
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Taxonomy
TopicsVLSI and Analog Circuit Testing · VLSI and FPGA Design Techniques · 3D IC and TSV technologies
