Flexible and Cost-Effective Spherical to Cartesian Coordinate Conversion Using 3-D CORDIC Algorithm on FPGA

TL;DR

This paper introduces a flexible, cost-effective 3-D CORDIC hardware architecture on FPGA for converting spherical to Cartesian coordinates, emphasizing simplicity, accuracy, and suitability for real-time applications.

Contribution

It presents a novel FPGA-based 3-D CORDIC processor design that is easy to modify and accurate for spherical to Cartesian coordinate conversion.

Findings

High accuracy in coordinate conversion

Low hardware complexity and cost

Suitable for real-time applications

Abstract

In computer science, transforming spherical coordinates into Cartesian coordinates is an important mathematical operation. The CORDIC (Coordinate Rotation Digital Computer) iterative algorithm can perform this operation, as well as trigonometric functions and vector rotations, using only simple arithmetic operations like addition, subtraction, and bit-shifting. This research paper presents hardware architecture for a 3-D CORDIC processor using Quartus II 7.1 ALTERA software, which enables easy modifications and design changes due to its regularity and simplicity. The proposed 3-D CORDIC model is evaluated by comparing the calculated results with the simulated results to determine its accuracy. The results were satisfaction and the proposed model could be suitable for numerous real-time applications.