An FPGA-Based Open-Source Hardware-Software Framework for Side-Channel Security Research
Davide Zoni, Andrea Galimberti, Davide Galli

TL;DR
This paper presents an open-source FPGA-based hardware-software framework designed to facilitate side-channel analysis research on IoT-class systems, enabling easier development and evaluation of security countermeasures.
Contribution
It introduces a comprehensive, open-source SoC framework with tools and features specifically for SCA research, streamlining the process for researchers and designers.
Findings
Provides an IoT-class SoC with RISC-V CPU and debug infrastructure
Includes scripts and tools for deploying SCA attacks and countermeasures
Supports the development and testing of SCA security measures
Abstract
Attacks based on side-channel analysis (SCA) pose a severe security threat to modern computing platforms, further exacerbated on IoT devices by their pervasiveness and handling of private and critical data. Designing SCA-resistant computing platforms requires a significant additional effort in the early stages of the IoT devices' life cycle, which is severely constrained by strict time-to-market deadlines and tight budgets. This manuscript introduces a hardware-software framework meant for SCA research on FPGA targets. It delivers an IoT-class system-on-chip (SoC) that includes a RISC-V CPU, provides observability and controllability through an ad-hoc debug infrastructure to facilitate SCA attacks and evaluate the platform's security, and streamlines the deployment of SCA countermeasures through dedicated hardware and software features such as a DFS actuator and FreeRTOS support. The…
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