Accurate Mapping of RNNs on Neuromorphic Hardware with Adaptive Spiking Neurons

TL;DR

This paper introduces a novel RNN architecture with adaptive spiking neurons that enables accurate mapping to neuromorphic hardware, demonstrating state-of-the-art audio classification results with low-power consumption.

Contribution

The paper presents the ${\Sigma}{\Delta}$-low-pass RNN architecture with adaptive spiking neurons, facilitating precise conversion of RNNs to SNNs for neuromorphic hardware.

Findings

Achieved state-of-the-art classification on audio benchmarks.

Implemented the model on Intel's Loihi chip with 3-bit weights.

Demonstrated robust rate and temporal coding integration.

Abstract

Thanks to their parallel and sparse activity features, recurrent neural networks (RNNs) are well-suited for hardware implementation in low-power neuromorphic hardware. However, mapping rate-based RNNs to hardware-compatible spiking neural networks (SNNs) remains challenging. Here, we present a ${\Sigma}{\Delta}$-low-pass RNN (lpRNN): an RNN architecture employing an adaptive spiking neuron model that encodes signals using ${\Sigma}{\Delta}$-modulation and enables precise mapping. The ${\Sigma}{\Delta}$-neuron communicates analog values using spike timing, and the dynamics of the lpRNN are set to match typical timescales for processing natural signals, such as speech. Our approach integrates rate and temporal coding, offering a robust solution for the efficient and accurate conversion of RNNs to SNNs. We demonstrate the implementation of the lpRNN on Intel's neuromorphic research chip Loihi, achieving state-of-the-art classification results on audio benchmarks using 3-bit weights. These results call for a deeper investigation of recurrency and adaptation in event-based systems, which may lead to insights for edge computing applications where power-efficient real-time inference is required.