RISC-V RVV efficiency for ANN algorithms

TL;DR

This paper evaluates the efficiency of RISC-V's RVV vector extension in accelerating Approximate Nearest Neighbors algorithms, proposing optimizations and a theoretical model to enhance performance on modern processors.

Contribution

It introduces a detailed analysis of RVV's impact on ANN algorithms, including adaptations, optimizations, and a theoretical performance model for RISC-V architectures.

Findings

RVV significantly improves ANN processing speed

Optimized vector configurations yield higher theoretical performance

Identified bottlenecks and tailored solutions for RISC-V implementations

Abstract

Handling vast amounts of data is crucial in today's world. The growth of high-performance computing has created a need for parallelization, particularly in the area of machine learning algorithms such as ANN (Approximate Nearest Neighbors). To improve the speed of these algorithms, it is important to optimize them for specific processor architectures. RISC-V (Reduced Instruction Set Computer Five) is one of the modern processor architectures, which features a vector instruction set called RVV (RISC-V Vector Extension). In machine learning algorithms, vector extensions are widely utilized to improve the processing of voluminous data. This study examines the effectiveness of applying RVV to commonly used ANN algorithms. The algorithms were adapted for RISC-V and optimized using RVV after identifying the primary bottlenecks. Additionally, we developed a theoretical model of a parameterized vector block and identified the best on average configuration that demonstrates the highest theoretical performance of the studied ANN algorithms when the other CPU parameters are fixed.