Efficient and Flexible Differet-Radix Montgomery Modular Multiplication for Hardware Implementation
Yuxuan Zhang, Hua Guo, Chen Chen, Yewei Guan, Xiyong Zhang, Zhenyu Guan

TL;DR
This paper introduces a novel parallel iterative Montgomery modular multiplication method, DRMMM, optimized for FPGA hardware, significantly reducing latency and enhancing efficiency for large modulus cryptographic operations.
Contribution
It proposes a flexible, radix-based parallel variant of Montgomery multiplication that enables pipelined quotient computation and optimized FPGA implementation.
Findings
Reduces FPGA latency by 38.3% compared to existing designs.
Supports larger moduli with efficient redundant computation handling.
Provides a high-performance hardware architecture for cryptographic applications.
Abstract
Montgomery modular multiplication is widely-used in public key cryptosystems (PKC) and affects the efficiency of upper systems directly. However, modulus is getting larger due to the increasing demand of security, which results in a heavy computing cost. High-performance implementation of Montgomery modular multiplication is urgently required to ensure the highly-efficient operations in PKC. However, existing high-speed implementations still need a large amount redundant computing to simplify the intermediate result. Supports to the redundant representation is extremely limited on Montgomery modular multiplication. In this paper, we propose an efficient parallel variant of iterative Montgomery modular multiplication, called DRMMM, that allows the quotient can be computed in multiple iterations. In this variant, terms in intermediate result and the quotient in each iteration are computed…
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Taxonomy
TopicsCryptography and Residue Arithmetic · Coding theory and cryptography · Polynomial and algebraic computation
