dAJC: A 2.02mW 50Mbps Direct Analog to MJPEG Converter for Video Sensor Node using Low-Noise Switched Capacitor MAC-Quantizer with Auto-Calibration and Sparsity-Aware ADC

TL;DR

This paper introduces a low-power analog video sensor node that significantly reduces power consumption by shifting processing to the analog domain and employing sparsity-aware ADCs, suitable for IoT and IoB applications.

Contribution

It presents a novel analog computation unit and sparsity-aware ADC design that together reduce power consumption in video sensor nodes by over four times and twenty times respectively.

Findings

Achieved approximately 4x reduction in power compared to digital implementations.

Implemented a sparsity-aware ADC enabling only significant samples, reducing ADC energy by 20x.

Demonstrated suitability for energy-constrained IoT and IoB video applications.

Abstract

With the advancement in the field of the Internet of Things(IoT) and Internet of Bodies(IoB), video camera applications using Video Sensor Nodes(VSNs) have gained importance in the field of autonomous driving, health monitoring, robot control, and security camera applications. However, these applications typically involve high data rates due to the transmission of high-resolution video signals, resulting from high data volume generated from the analog-to-digital converters (ADCs). This significant data deluge poses processing and storage overheads, exacerbating the problem. To address this challenge, we propose a low-power solution aimed at reducing the power consumption in Video Sensor Nodes (VSNs) by shifting the computation from the digital domain to the inherently energy-efficient analog domain. Unlike standard architectures where computation and processing are typically performed in digital signal processing (DSP) blocks after the ADCs, our approach eliminates the need for such blocks. Instead, we leverage a switched capacitor-based computation unit in the analog domain, resulting in a reduction in power consumption. We achieve a $\sim4X$ reduction in power consumption compared to digital implementations. Furthermore, we employ a sparsity-aware ADC, which is enabled only for significant compressed samples that contribute to a small fraction ($\le5\%$) of the total captured analog samples, we achieve a $\sim20X$ lower ADC conversion energy without any considerable degradation, contributing to the overall energy savings in the system.