A Scalable FPGA Architecture for Quantum Computing Simulation

TL;DR

This paper proposes a scalable FPGA-based architecture to enhance the simulation of quantum circuits by leveraging parallelism and custom design, demonstrated on an Intel Agilex FPGA.

Contribution

It introduces a novel scalable FPGA architecture tailored for quantum circuit simulation, addressing parallelism and routing challenges.

Findings

Achieved high performance in quantum circuit simulation on FPGA.

Demonstrated scalability with larger quantum circuits.

Improved routing efficiency for quantum state components.

Abstract

A quantum computing simulation provides the opportunity to explore the behaviors of quantum circuits, study the properties of quantum gates, and develop quantum computing algorithms. Simulating quantum circuits requires geometric time and space complexities, impacting the size of the quantum circuit that can be simulated as well as the respective time required to simulate a particular circuit. Applying the parallelism inherent in the simulation and crafting custom architectures, larger quantum circuits can be simulated. A scalable accelerator architecture is proposed to provide a high performance, highly parallel, accelerator. Among the challenges of creating a scalable architecture is managing parallelism, efficiently routing quantum state components for gate evaluation, and measurement. An example is demonstrated on an Intel Agilex field programmable gate array (FPGA).