A 103-TOPS/mm$^2$ Integrated Photonic Computing Engine Enabling Next-Generation Reservoir Computing

TL;DR

This paper reports the first integrated photonic reservoir computing system achieving 103 TOPS/mm$^2$ density and 60 Gbaud speed, demonstrating superior performance, interpretability, and potential for ultrafast on-chip signal processing.

Contribution

It introduces the first high-speed integrated photonic reservoir computing engine with state-of-the-art performance and a simple passive design, enabling ultrafast, scalable, and interpretable photonic computing.

Findings

Achieved 60 Gbaud speed in photonic RC system.

Demonstrated 103 TOPS/mm$^2$ computing density.

Showcased high performance on forecasting and classification tasks.

Abstract

Reservoir computing (RC) is a leading machine learning algorithm for information processing due to its rich expressiveness. A new RC paradigm has recently emerged, showcasing superior performance and delivering more interpretable results with shorter training data sets and training times, representing the next generation of RC computing. This work presents the first realization of a high-speed next-generation RC system on an integrated photonic chip. Our experimental results demonstrate state-of-the-art forecasting and classification performances under various machine learning tasks and achieve the fastest speeds of 60 Gbaud and a computing density of 103 tera operations/second/mm$^2$ (TOPS/mm$^2$). The passive system, composed of a simple star coupler with on-chip delay lines, offers several advantages over traditional RC systems, including no speed limitations, compact footprint, extremely high fabrication error tolerance, fewer metaparameters, and greater interpretability. This work lays the foundation for ultrafast on-chip photonic RC, representing significant progress toward developing next-generation high-speed photonic computing and signal processing.