Just-in-Time Packet State Prefetching

TL;DR

This paper proposes a novel packet processing architecture that uses external hints about upcoming packets to prefetch necessary state into cache, significantly improving throughput.

Contribution

It introduces a new approach for obtaining and utilizing future packet information to enhance CPU-based packet processing efficiency.

Findings

Prefetching based on external hints can increase throughput by at least 50%.

External hints can be obtained from network devices or end hosts.

The architecture enables more efficient cache utilization for packet processing.

Abstract

Could information about future incoming packets be used to build more efficient CPU-based packet processors? Can such information be obtained accurately? This paper studies novel packet processing architectures that receive external hints about which packets are soon to arrive, thus enabling prefetching into fast cache memories of the state needed to process them, just-in-time for the packets' arrival. We explore possible approaches to (i) obtain such hints either from network devices or the end hosts in the communication and (ii) use these hints to better utilize cache memories. We show that such information (if accurate) can improve packet processing throughput by at least 50%.