Computational Graph Representation of Equations System Constructors in Hierarchical Circuit Simulation

TL;DR

This paper introduces a computational graph-based method for representing hierarchical circuit equations, enabling efficient device modeling, parameter sensitivity analysis, and gradient computation in circuit simulation and design.

Contribution

It proposes a novel equations system constructor using computational graphs and JSON netlists, improving flexibility, efficiency, and reusability in hierarchical circuit modeling.

Findings

Supports circuit simulation and design with improved efficiency.

Enables end-to-end gradient computation for parameters.

Demonstrated on CMOS models and OpAmp device sizing.

Abstract

Equations system constructors of hierarchical circuits play a central role in device modeling, nonlinear equations solving, and circuit design automation. However, existing constructors present limitations in applications to different extents. For example, the costs of developing and reusing device models -- especially coarse-grained equivalent models of circuit modules -- remain high while parameter sensitivity analysis is complex and inefficient. Inspired by differentiable programming and leveraging the ecosystem benefits of open-source software, we propose an equations system constructor using the computational graph representation, along with its JSON format netlist, to address these limitations. This representation allows for runtime dependencies between signals and subcircuit/device parameters. The proposed method streamlines the model development process and facilitates end-to-end computation of gradients of equations remainders with respect to parameters. This paper discusses in detail the overarching concept of hierarchical subcircuit/device decomposition and nested invocation by drawing parallels to functions in programming languages, and introduces rules for parameters passing and gradient propagation across hierarchical circuit modules. The presented numerical examples, including (1) an uncoupled CMOS model representation using "equivalent circuit decomposition+dynamic parameters" and (2) operational amplifier (OpAmp) auto device sizing, have demonstrated that the proposed method supports circuit simulation and design and particularly subcircuit modeling with improved efficiency, simplicity, and decoupling compared to existing techniques.