Verifying Peephole Rewriting In SSA Compiler IRs
Siddharth Bhat, Alex Keizer, Chris Hughes, Andr\'es Goens, Tobias, Grosser

TL;DR
This paper introduces a formal framework in Lean for verifying peephole rewrites in SSA-based IRs, combining automation and theorem proving to ensure correctness across diverse domain-specific compiler IRs.
Contribution
It formalizes a generic SSA calculus, provides tools for verifying peephole rewrites, and demonstrates applicability through three diverse MLIR ecosystem use cases.
Findings
Proved correctness of peephole rewrites in SSA IRs.
Validated the framework on LLVM bitvector rewrites, control flow, and encryption.
Enabled formal verification for domain-specific compiler transformations.
Abstract
There is an increasing need for domain-specific reasoning in modern compilers. This has fueled the use of tailored intermediate representations (IRs) based on static single assignment (SSA), like in the MLIR compiler framework. Interactive theorem provers (ITPs) provide strong guarantees for the end-to-end verification of compilers (e.g., CompCert). However, modern compilers and their IRs evolve at a rate that makes proof engineering alongside them prohibitively expensive. Nevertheless, well-scoped push-button automated verification tools such as the Alive peephole verifier for LLVM-IR gained recognition in domains where SMT solvers offer efficient (semi) decision procedures. In this paper, we aim to combine the convenience of automation with the versatility of ITPs for verifying peephole rewrites across domain-specific IRs. We formalize a core calculus for SSA-based IRs that is generic…
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Distributed and Parallel Computing Systems · Logic, programming, and type systems
