A Jammer-Mitigating 267 Mb/s 3.78 mm$^2$ 583 mW 32$\times$8 Multi-User MIMO Receiver in 22FDX

TL;DR

This paper introduces a novel 22nm FD-SOI multi-user MIMO receiver ASIC capable of mitigating jamming attacks, supporting multiple modulation schemes, and maintaining reliable data detection with high throughput and low power consumption.

Contribution

It presents the first multi-user MIMO receiver ASIC that jointly performs jammer mitigation and data detection using a nonlinear algorithm in a compact, low-power design.

Findings

Supports 8 UEs and 32 BS antennas

Achieves 267 Mb/s throughput at 583 mW

Effectively mitigates barrage and smart jammers

Abstract

We present the first multi-user (MU) multiple-input multiple-output (MIMO) receiver ASIC that mitigates jamming attacks. The ASIC implements a recent nonlinear algorithm that performs joint jammer mitigation (via spatial filtering) and data detection (using a box prior on the data symbols). Our design supports 8 user equipments (UEs) and 32 basestation (BS) antennas, QPSK and 16-QAM with soft-outputs, and enables the mitigation of single-antenna barrage jammers and smart jammers. The fabricated 22 nm FD-SOI ASIC includes preprocessing, has a core area of 3.78 mm$^2$, achieves a throughput of 267 Mb/s while consuming 583 mW, and is the only existing design that enables reliable data detection under jamming attacks.