TRIP: Trainable Region-of-Interest Prediction for Hardware-Efficient Neuromorphic Processing on Event-based Vision

TL;DR

TRIP introduces a hardware-efficient, trainable attention framework for event-based vision on neuromorphic processors, significantly reducing computation, latency, and energy while maintaining high accuracy across multiple datasets.

Contribution

It is the first to propose a hardware-efficient hard attention method for event-based vision on neuromorphic hardware, optimizing ROI prediction for improved efficiency.

Findings

Achieves state-of-the-art accuracy on multiple datasets.

Reduces computation by 46x on DvsGesture dataset.

Enables over 2x improvements in latency and energy consumption.

Abstract

Neuromorphic processors are well-suited for efficiently handling sparse events from event-based cameras. However, they face significant challenges in the growth of computing demand and hardware costs as the input resolution increases. This paper proposes the Trainable Region-of-Interest Prediction (TRIP), the first hardware-efficient hard attention framework for event-based vision processing on a neuromorphic processor. Our TRIP framework actively produces low-resolution Region-of-Interest (ROIs) for efficient and accurate classification. The framework exploits sparse events' inherent low information density to reduce the overhead of ROI prediction. We introduced extensive hardware-aware optimizations for TRIP and implemented the hardware-optimized algorithm on the SENECA neuromorphic processor. We utilized multiple event-based classification datasets for evaluation. Our approach achieves state-of-the-art accuracies in all datasets and produces reasonable ROIs with varying locations and sizes. On the DvsGesture dataset, our solution requires 46x less computation than the state-of-the-art while achieving higher accuracy. Furthermore, TRIP enables more than 2x latency and energy improvements on the SENECA neuromorphic processor compared to the conventional solution.