An Open-Source Framework for Rapid Validation of Scientific ASICs

TL;DR

Spacely is an open-source framework that enables rapid, flexible, and reusable post-silicon validation of ASICs across analog, digital, and mixed-signal domains, especially suited for small research teams.

Contribution

It introduces a comprehensive open-source framework combining hardware, software, and design practices for efficient ASIC validation, tailored for academic and research environments.

Findings

Reduces validation time for ASICs

Supports multiple hardware platforms and instruments

Provides high-level Python interface for testing

Abstract

Spacely is an open-source framework for the post-silicon validation of analog, digital, and mixed-signal ASICs (Application-Specific Integrated Circuits) which maximizes the reuse of hardware and software, reducing the time taken to achieve meaningful test results. Spacely specifically addresses the needs of small, flexible ASIC design teams commonly found in academia or research institutions which benefit most from sharing the overhead of test stand creation between many unique ASIC designs. Spacely is a set of software, firmware, and design practices. It targets two primary hardware platforms (NI-PXI and Caribou) as well as offering extensible support for bench instruments. Spacely provides a high-level Python interface to all test hardware for accessibility, while also giving more sophisticated teams the opportunity to integrate custom test firmware. The design principles of Spacely are presented, along with a demonstrative example of using Spacely to test a pixel detector readout ASIC.