Extrapolating Pauli Checks for Expectation Value Estimation on Noisy Quantum Devices

TL;DR

This paper introduces Pauli Check Extrapolation (PCE), a novel error mitigation method for noisy quantum devices that improves expectation value estimation by extrapolating from circuits with varying checks, outperforming existing techniques.

Contribution

The paper proposes PCE, an innovative extrapolation-based error mitigation technique that enhances expectation value accuracy on noisy quantum hardware, reducing sampling costs and surpassing ZNE and Robust Shadow methods.

Findings

PCE outperforms ZNE on simulated and real hardware for larger circuits.

PCE achieves up to 99.2% fidelity on 4-qubit circuits, surpassing baseline and ZNE.

PCE reduces sample requirements compared to Robust Shadow estimation.

Abstract

Pauli Check Sandwiching (PCS) is an error detection scheme that protects quantum circuits by inserting pairs of parity checks and discarding runs that signal errors. However, each additional check introduces noise and exponentially increases sampling costs. To address these limitations, we propose Pauli Check Extrapolation (PCE), an error mitigation technique that obtains measured expectation values from circuits with different numbers of checks and, analogous to ZNE, extrapolates to the ``maximum check'' limit -- the theoretical number of checks required for unit fidelity. We test linear and exponential ansatzes, deriving the exponential form from the Markovian error model. Benchmarking PCE against ZNE on random Clifford circuits with simulated depolarizing noise shows PCE outperforming ZNE for larger circuits. On real IBM hardware, PCE achieves an accuracy of up to 99.2% (56.2% improvement over baseline), compared to ZNE's 82% accuracy (29.1% improvement over baseline), for 4-qubit circuits. To demonstrate a practical use case, we then apply PCE towards mitigating errors in classical shadow measurements. Our results show that PCE can achieve fidelities greater than the state-of-the-art Robust Shadow estimation, while significantly reducing the number of required samples by eliminating the need for a calibration procedure. We validate these findings on both fully connected topologies and simulated IBM hardware backends.