Machine learning evaluation in the Global Event Processor FPGA for the ATLAS trigger upgrade
Zhixing Jiang, Scott Hauck, Dennis Yin, Bowen Zuo, Ben Carlson,, Shih-Chieh Hsu, Allison Deiana, Rohin Narayan, Santosh Parajuli, Jeff, Eastlack

TL;DR
This paper demonstrates how machine learning algorithms can be automatically generated and deployed within the FPGA-based Global Event Processor of the ATLAS experiment, significantly enhancing real-time event filtering performance.
Contribution
It introduces methods to automatically create machine learning algorithms for FPGA deployment in high-energy physics, achieving low latency and resource-efficient implementations.
Findings
ML algorithms achieved latency of 1.2 microseconds
Resource utilization was less than 5% on Xilinx FPGA
Successful deployment within the GEP system demonstrated improved filtering performance
Abstract
The Global Event Processor (GEP) FPGA is an area-constrained, performance-critical element of the Large Hadron Collider's (LHC) ATLAS experiment. It needs to very quickly determine which small fraction of detected events should be retained for further processing, and which other events will be discarded. This system involves a large number of individual processing tasks, brought together within the overall Algorithm Processing Platform (APP), to make filtering decisions at an overall latency of no more than 8ms. Currently, such filtering tasks are hand-coded implementations of standard deterministic signal processing tasks. In this paper we present methods to automatically create machine learning based algorithms for use within the APP framework, and demonstrate several successful such deployments. We leverage existing machine learning to FPGA flows such as hls4ml and fwX to…
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Taxonomy
TopicsParticle Detector Development and Performance · Distributed and Parallel Computing Systems · Radiation Detection and Scintillator Technologies
