Controlled Erasure as a Building Block for Universal Thermodynamically-Robust Superconducting Computing
Christian Z. Pratt, Kyle J. Ray, James P. Crutchfield

TL;DR
This paper introduces a superconducting device-based computing paradigm that uses controlled landscape manipulation to perform universal logic operations with high speed and energy efficiency, overcoming limitations of traditional CMOS technology.
Contribution
It presents a novel controlled erase protocol in superconducting circuits enabling universal logic gates, demonstrating robustness and high-speed operation at thermal energy scales.
Findings
Implement a controlled erase protocol in SQUID devices.
Achieve GHz operation speeds.
Demonstrate robustness against logical errors.
Abstract
Reducing the energy inefficiency of conventional CMOS-based computing devices -- which rely on logically irreversible gates to process information -- remains both a fundamental engineering challenge and a practical social challenge of increasing importance. We extend an alternative computing paradigm that manipulates microstate distributions to store information in the metastable minima determined by an effective potential energy landscape. These minima serve as mesoscopic memories that are manipulated by a dynamic landscape to perform information processing. Central to our results is the control erase (CE) protocol that controls the landscape's metastable minima to determine whether information is preserved or erased. Importantly, successive protocol executions can implement a NAND gate -- a logically-irreversible universal logic gate. We show how to practically implement this in a…
Peer Reviews
No public reviews on file for this paper yet. If you reviewed it on a platform where reviews are public (OpenReview, ICLR, NeurIPS, ICML), you can paste yours below so the community can read it here.
Videos
No videos yet. Explain this paper in a talk, walkthrough, or lecture? Add one.
Taxonomy
TopicsNeural Networks and Applications · Ferroelectric and Negative Capacitance Devices · Quantum Computing Algorithms and Architecture
