Hardware-based stack buffer overflow attack detection on RISC-V architectures

TL;DR

This paper evaluates hardware-based detection methods for stack buffer overflow attacks on RISC-V architectures, highlighting challenges and proposing a combined hardware-software approach as a promising solution.

Contribution

It provides an analysis of hardware-based SBO attack detection on RISC-V and suggests a hybrid detection strategy to improve effectiveness.

Findings

Hardware detection alone faces performance challenges

Combining hardware and software detectors enhances detection capabilities

Hardware approaches offer significant benefits for RISC-V security

Abstract

This work evaluates how well hardware-based approaches detect stack buffer overflow (SBO) attacks in RISC-V systems. We conducted simulations on the PULP platform and examined micro-architecture events using semi-supervised anomaly detection techniques. The findings showed the challenge of detection performance. Thus, a potential solution combines software and hardware-based detectors concurrently, with hardware as the primary defense. The hardware-based approaches present compelling benefits that could enhance RISC-V-based architectures.